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Ingrid Verbauwhede

Ingrid Verbauwhede

Courses summary

Current research team

Josep Balasch, Lejla Batina, Amitabh Das, Benedikt Gierlichs, Roel Maes, Nele Mentens, Oscar Reparaz, Sujoy Sinha Roy, Leif Uhsadel, Anthony Van Herrewege, Jo Vliegen, Bohan Yang

Active projects

Publications

2013
1. S. Ghosh, A. Kumar, A. Das, and I. Verbauwhede, "On the Implementation of Unified Arithmetic on Binary Huff Curves," In Cryptographic Hardware and Embedded Systems - CHES 2013, Lecture Notes in Computer Science, Springer-Verlag, 16 pages, 2013.
2. L. Batina, A. Das, B. Ege, E. B. Kavun, N. Mentens, C. Paar, I. Verbauwhede, and T. Yalcin, "Dietary Recommendations for Lightweight Block Ciphers: Power, Energy and Area Analysis of Recently Developed Architectures," In Workshop on RFID Security 2013, Lecture Notes in Computer Science, Springer-Verlag, 10 pages, 2013.
3. B. Ege, A. Das, L. Batina, and I. Verbauwhede, "Security of Countermeasures Against State-of-the-Art Differential Scan Attacks," In TRUDEVICE 2013, 6 pages, 2013.
4. D. Karaklajic, A. Das, and I. Verbauwhede, "Secure Mutual Testing Strategy for Cryptographic SoCs," COSIC internal report, 10 pages, 2013.
5. J. Delvaux, and I. Verbauwhede, "Side Channel Modeling Attacks on 65nm Arbiter PUFs Exploiting CMOS Device Noise," In 6th IEEE International Symposium on Hardware-Oriented Security and Trust - HOST 2013, IEEE, 6 pages, 2013.
6. J. Fan, O. Reparaz, V. Rozic, and I. Verbauwhede, "Low-energy encryption for medical devices: security adds an extra design dimension," In 50th Design Automation Conference (DAC 2013), IEEE, pp. 1-6, 2013.
7. M. Yu, D. M'Raïhi, S. Devadas, and I. Verbauwhede, "Security and Reliability Properties of Syndrome Coding Techniques Used in PUF Key Generation," In GOMACTech conference 38, GomacTech, pp. 1-4, 2013.
8. L. Uhsadel, M. Ullrich, A. Das, D. Karaklajic, J. Balasch, I. Verbauwhede, and W. Dehaene, "Teaching HW/SW co-design with a public key cryptography application," IEEE Transactions on Education 56(2), 6 pages, 2013.
9. A. Das, J. Da Rolt, S. Ghosh, S. Seys, S. Dupuis, G. Di Natale, M. Flottes, B. Rouzeyre, and I. Verbauwhede, "Secure JTAG implementation using Schnorr Protocol," Journal of Electronic Testing: Theory and Applications 29(2), pp. 193-209, 2013.
2012
1. B. Groza, S. Murvay, A. Van Herrewege, and I. Verbauwhede, "LiBrA-CAN: a Lightweight Broadcast Authentication protocol for Controller Area Networks," In Cryptology and Network Security, #E International Conference, CANS 2012, Lecture Notes in Computer Science, M. Manulis, J. Pieprzyk, and A. Sadeghi (eds.), Springer-Verlag, 16 pages, 2012.
2. I. Verbauwhede, and K. Tiri, "Methods for differential pair conductor routing in a logic circuit ", Patent number 8,324,937, The Regents of the University of California (applicant), 2012.
3. G. Hospodar, R. Maes, and I. Verbauwhede, "Machine Learning Attacks on 65nm Arbiter PUFs: Accurate Modeling poses strict Bounds on Usability," In 4th IEEE International Workshop on Information Forensics and Security (WIFS 2012), IEEE, 6 pages, 2012.
4. J. Balasch, S. Faust, B. Gierlichs, and I. Verbauwhede, "Theory and Practice of a Leakage Resilient Masking Scheme," In Advances in Cryptology - ASIACRYPT 2012, Lecture Notes in Computer Science 7658, K. Sako, and X. Wang (eds.), Springer-Verlag, pp. 758-775, 2012.
5. I. Verbauwhede, "Efficient and secure hardware," Datenschutz und Datensicherheit 36(12), pp. 872-875, 2012.
6. D. Yamamoto, G. Hospodar, R. Maes, and I. Verbauwhede, "Performance and Security Evaluation of AES S-Box-based Glitch PUFs on FPGAs," In International Conference on Security, Privacy and Applied Cryptography Engineering (SPACE 2012), Lecture Notes in Computer Science, Springer-Verlag, 18 pages, 2012.
7. A. Van Herrewege, and I. Verbauwhede, "Tiny, Application-Specific, Programmable Processor for BCH Decoding," In International Symposium on System-on-Chip 2012, IEEE Computer Society, 5 pages, 2012.
8. J. Da Rolt, A. Das, S. Ghosh, G. Di Natale, M. Flottes, B. Rouzeyre, and I. Verbauwhede, "Scan Attacks on Side-Channel and Fault Attack Resistant Public-Key Implementations," Journal of Cryptographic Engineering 2(4), pp. 207-219, 2012.
9. J. Da Rolt, A. Das, G. Di Natale, M. Flottes, B. Rouzeyre, and I. Verbauwhede, "A New Scan Attack on Elliptic Curve Cryptosystems in presence of Industrial Design for Testability Structures," In IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, IEEE Computer Society, IEEE, pp. 43-48, 2012.
10. P. Koeberl, R. Maes, V. Rozic, V. Van der Leest, E. Van der Sluis, and I. Verbauwhede, "Experimental Evaluation of Physically Unclonable Functions in 65 nm CMOS," In 38th European Solid-State Circuits Conference (ESSCIRC 2012), IEEE, 4 pages, 2012.
11. O. Reparaz, B. Gierlichs, and I. Verbauwhede, "Selecting Time Samples for Multivariate DPA Attacks," In Cryptographic Hardware and Embedded Systems - CHES 2012, Lecture Notes in Computer Science 7428, E. Prouff, and P. Schaumont (eds.), Springer-Verlag, pp. 155-174, 2012.
12. R. Maes, A. Van Herrewege, and I. Verbauwhede, "PUFKY: A Fully Functional PUF-based Cryptographic Key Generator," In Cryptographic Hardware and Embedded Systems - CHES 2012, Lecture Notes in Computer Science 7428, E. Prouff, and P. Schaumont (eds.), Springer-Verlag, 16 pages, 2012.
13. B. Ege, A. Das, S. Ghosh, and I. Verbauwhede, "Differential Scan Attack on AES with X-Tolerant and X-Masked Test Response Compactor," In DSD, IEEE Computer Society, IEEE, pp. 545-552, 2012.
14. R. Maes, "Physically Unclonable Functions: Constructions, Properties and Applications," PhD thesis, KU Leuven, I. Verbauwhede (promotor), 234+20 pages, 2012.
15. A. Bogdanov, M. Knezevic, G. Leander, D. Toz, K. Varici, and I. Verbauwhede, " SPONGENT: The Design Space of Lightweight Cryptographic Hashing," IEEE Transactions on Computers y(y), 14 pages, 2012.
16. H. Kim, V. Rozic, and I. Verbauwhede, "Three Phase Dynamic Current Mode Logic: A more secure DyCML to achieve a more balanced power consumption," In Information Security Applications, 13th International Workshop, WISA 2012, Lecture Notes in Computer Science, Springer-Verlag, 14 pages, 2012.
17. L. Uhsadel, M. Ullrich, B. Preneel, and I. Verbauwhede, "Interface design for mapping a variety of RSA exponentiation algorithms on a HW/SW co-design platform," In 23rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2012), IEEE, pp. xxx-yyy, 2012.
18. S. Ghosh, J. Delvaux, L. Uhsadel, and I. Verbauwhede, "A Speed Area Optimized Embedded Co-processor for McEliece Cryptosystem," In 23rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2012), IEEE, 7 pages, 2012.
19. J. Balasch, B. Preneel, A. Rial, M. Scheir, and I. Verbauwhede, "Anonymous E-Cash for Resource Constrained Devices," COSIC internal report, 10 pages, 2012.
20. "Workshop on RFID Security 2012", Lecture Notes in Computer Science 7739, J. Hoepman, and I. Verbauwhede (eds.), Springer-Verlag, 2012.
21. A. Coyette, "Embedded Security for Car Telematics and Infotainment," Master thesis, KU Leuven, I. Verbauwhede (promotor), 73+8 pages, 2012.
22. B. Car, "Implementation and Evaluation of Zero-Knowledge Proofs of Knowledge," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 65 pages, 2012.
23. V. Rozic, W. Dehaene, and I. Verbauwhede, "Design Solutions for Securing SRAM Cell Against Power Analysis ," In 5th IEEE International Symposium on Hardware-Oriented Security and Trust - HOST 2012, IEEE, 6 pages, 2012.
24. D. Karaklajic, J. Fan, and I. Verbauwhede, "A Systematic M safe-error Detection in Hardware Implementations of Cryptographic Algorithms," In 5th IEEE International Workshop on Hardware-Oriented Security and Trust - HOST 2012, IEEE, pp. 96-101, 2012.
25. M. Scheir, "Ontwerp en Implementatie van een Anoniem E-Cash Systeem voor Computationeel Beperkte Platformen," Master thesis, Katholieke Universiteit Leuven, J. Driesen, B. Preneel, and I. Verbauwhede (promotors), 152 pages, 2012.
26. J. Verbist, "Praktijkgerichte Aanvallen op Beveiliging van Auto's," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), 61 pages, 2012.
27. G. Hospodar, I. Verbauwhede, and J. Gomes, "Algorithms for Digital Image Steganography via Statistical Restoration," In 2nd Joint WIC/IEEE Symposium on Information Theory and Signal Processing in the Benelux, Delft University of Technology, 8 pages, 2012.
28. S. Ghosh, I. Verbauwhede, and D. Roychowdhury, "Core Based Architecture to Speed up Optimal Ate Pairing on FPGA Platform," In Pairing-Based Cryptography - Pairing 2012, Lecture Notes in Computer Science, Springer-Verlag, 18 pages, 2012.
29. G. Xiaoxu Yao, J. Fan, R. C. Cheung, and I. Verbauwhede, "Faster Pairing Coprocessor Architecture," In Pairing-Based Cryptography - Pairing 2012, Lecture Notes in Computer Science, Springer-Verlag, 18 pages, 2012.
30. L. Uhsadel, M. Ullrich, B. Preneel, and I. Verbauwhede, "HW/SW co-design of RSA on 8051," In European Workshop on Microelectronics Education, EDA, pp. 41-44, 2012.
31. J. Da Rolt, A. Das, G. Di Natale, M. Flottes, B. Rouzeyre, and I. Verbauwhede, "A New Scan Attack on RSA in Presence of Industrial Countermeasures," In Third International Workshop on Constructive Side-Channel Analysis and Design, Lecture Notes in Computer Science LNCS Springer, Springer-Verlag, pp. 89-104, 2012.
32. A. Das, B. Ege, and I. Verbauwhede, "Security Analysis of Industrial Test Compression Schemes," COSIC internal report, 7 pages, 2012.
33. D. Karaklajic, and I. Verbauwhede, "A Design Flow for Safe-error Attack Resistant Cryptographic Hardware," COSIC internal report, 12 pages, 2012.
34. F. Veljkovic, V. Rozic, and I. Verbauwhede, "Low-Cost Implementations of On-the-fly Tests for Random Number Generators," In Design, Automation and Test in Europe (DATE 2012) Dresden, Germany, IEEE, 6 pages, 2012.
35. A. Das, U. Kocabas, A. Sadeghi, and I. Verbauwhede, "PUF-based Secure Test Wrapper Design for Cryptographic SoC Testing," In Design, Automation and Test in Europe (DATE 2012) Dresden, Germany, IEEE, pp. 866-869, 2012.
36. J. Balasch, B. Gierlichs, R. Verdult, L. Batina, and I. Verbauwhede, "Power Analysis of Atmel CryptoMemory - Recovering Keys from Secure EEPROMs," In Topics in Cryptology - CT-RSA 2012, The Cryptographers' Track at the RSA Conference, Lecture Notes in Computer Science 7178, O. Dunkelman (ed.), Springer-Verlag, pp. 19-34, 2012.
37. R. Maes, R. Peeters, A. Van Herrewege, C. Wachsmann, S. Katzenbeisser, A. Sadeghi, and I. Verbauwhede, "Reverse Fuzzy Extractors: Enabling Lightweight Mutual Authentication for PUF-enabled RFIDs," In Financial Cryptography and Data Security - 16th International Conference, FC 2012, Lecture Notes in Computer Science 7397, A. D. Keromytis (ed.), Springer-Verlag, pp. 374--389, 2012.
38. L. Batina, Y. K. Lee, S. Seys, D. Singelée, and I. Verbauwhede, "Extending ECC-Based RFID Authentication Protocols to Privacy-Preserving Multi-Party Grouping Proofs," Journal of Personal and Ubiquitous Computing 16(3), pp. 323-335, 2012.
39. J. Fan, "Efficient arithmetic for embedded cryptography and cryptanalysis," PhD thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 153 pages, 2012.
40. D. Karaklajic, J. Schmidt, and I. Verbauwhede, "Hardware Designer's Guide to Fault Attacks," IEEE Transactions on Very Large Scale Integration (VLSI) Systems -(-), 14 pages, 2012.
41. M. Potkonjak, R. Karri, I. Verbauwhede, and K. Itoh, "Guest Editorial Integrated Circuit and System Security," IEEE Transactions on Information Forensics and Security 7(1), pp. 1-2, 2012.
42. R. Maes, D. Schellekens, and I. Verbauwhede, "A Pay-per-Use Licensing Scheme for Hardware IP Cores in Recent SRAM based FPGAs," IEEE Transactions on Information Forensics and Security 7(1), pp. 98-108, 2012.
43. G. Hospodar, R. Maes, and I. Verbauwhede, "Implications of Machine Learning Attacks on Arbiter PUF-based Challenge-Response Authentication and Secure Key Generation," COSIC internal report, 6 pages, 2012.
44. W. Aerts, E. Biham, D. De Moitié, E. De Mulder, O. Dunkelman, S. Indesteege, N. Keller, B. Preneel, G. Vandenbosch, and I. Verbauwhede, "A Practical Attack on KeeLoq," Journal of Cryptology 25(1), pp. 136-157, 2012.
45. J. Fan, and I. Verbauwhede, "An Updated Survey on Secure ECC Implementations: Attacks, Countermeasures and Cost," In Cryptography and Security: From Theory to Applications - Essays Dedicated to Jean-Jacques Quisquater on the Occasion of His 65th Birthday, Lecture Notes in Computer Science 6805, D. Naccache (ed.), Springer-Verlag, pp. 265-282, 2012.
46. M. Knezevic, L. Batina, E. De Mulder, J. Fan, B. Gierlichs, Y. K. Lee, R. Maes, and I. Verbauwhede, "Signal Processing for Cryptography and Security Applications," In Handbook of Signal Processing Systems (2nd edition), S. S. Bhattacharyya, E. F. Deprettere, R. Leupers, and J. Takala (eds.), Springer, 19 pages, 2012.
2011
1. J. Da Rolt, A. Das, G. Di Natale, M. Flottes, B. Rouzeyre, and I. Verbauwhede, "Security Analysis Tool for Scan-Based Side-Channel Attacks on Cryptographic Circuits," COSIC internal report, 10 pages, 2011.
2. G. Hospodar, B. Gierlichs, E. De Mulder, J. Vandewalle, and I. Verbauwhede, "Machine Learning in Side-Channel Analysis: A First Study," Journal of Cryptographic Engineering 1(4), pp. 293-302, 2011.
3. A. Van Herrewege, D. Singelée, and I. Verbauwhede, "CANAuth - A Simple, Backward Compatible Broadcast Authentication Protocol for CAN bus," In ECRYPT Workshop on Lightweight Cryptography 2011, 7 pages, 2011.
4. A. Bogdanov, M. Knezevic, G. Leander, D. Toz, K. Varici, and I. Verbauwhede, "SPONGENT: The Design Space of Lightweight Cryptographic Hashing," In Lightweight Cryptography, 23 pages, 2011.
5. A. Van Herrewege, D. Singelée, and I. Verbauwhede, "CANAuth - A Simple, Backward Compatible Broadcast Authentication Protocol for CAN bus," In Embedded Security in Cars 9th, 7 pages, 2011.
6. R. C. Cheung, S. Duquesne, J. Fan, N. Guillermin, I. Verbauwhede, and G. Xiaoxu Yao, "FPGA Implementations of Pairing using Residue Number System and Lazy Reduction," In Cryptographic Hardware and Embedded Systems - CHES 2011, Lecture Notes in Computer Science 6917, B. Preneel, and T. Takagi (eds.), Springer-Verlag, 21 pages, 2011.
7. A. Bogdanov, M. Knezevic, G. Leander, D. Toz, K. Varici, and I. Verbauwhede, "SPONGENT: A Lightweight Hash Function," In Cryptographic Hardware and Embedded Systems - CHES 2011, Lecture Notes in Computer Science 6917, B. Preneel, and T. Takagi (eds.), Springer-Verlag, pp. 312-327, 2011.
8. I. Verbauwhede, "The fault attack jungle - yet another concern for the designer (invited)," IEEE International Workshop on Fault Diagnosis and Tolerance in Cryptography, Nara, Japan, 2011.
9. K. Sakiyama, M. Knezevic, J. Fan, B. Preneel, and I. Verbauwhede, "Tripartite Modular Multiplication," Integration, the VLSI Journal 44(4), pp. 259-269, 2011.
10. J. Fan, L. Batina, and I. Verbauwhede, "Design and design methods for unified multiplier and inverter and its application for HECC," Integration, the VLSI Journal 44(4), pp. 280-289, 2011.
11. M. Tehranipour, S. Devadas, K. Gotze, F. Koushanfar, M. Potkonjak, I. Verbauwhede, and D. Yeh (Editor), "Can we trust the chips of the future?," IEEE Design & Test of Computers 28(5), pp. 96-103, 2011.
12. I. Verbauwhede, "The cost of cryptography: is low budget possible?," In 17th IEEE International On-Line Testing Symposium (IOLTS 2011), IEEE, pp. 133-133, 2011.
13. J. Balasch, B. Gierlichs, and I. Verbauwhede, "An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs," In International Workshop on Fault Diagnosis and Tolerance in Cryptography 2011, IEEE, pp. 105-114, 2011.
14. I. Verbauwhede, D. Karaklajic, and J. Schmidt, "The Fault Attack Jungle - A Classification Model to Guide You," In International Workshop on Fault Diagnosis and Tolerance in Cryptography 2011, IEEE, pp. 3-8, 2011.
15. J. Balasch, C. Diaz, C. Li, A. Rial, and I. Verbauwhede, "Anonymous Payment Mechanisms for Electric Car Infrastructure," COSIC internal report, 5 pages, 2011.
16. L. Batina, S. Seys, D. Singelée, and I. Verbauwhede, "Hierarchical ECC-Based RFID Authentication Protocol," In Workshop on RFID Security 2011, Lecture Notes in Computer Science 7055, K. Fu, A. Juels, and C. Paar (eds.), Springer-Verlag, pp. 183-201, 2011.
17. A. Braeken, J. Vliegen, N. Mentens, A. Touhafi, I. Verbauwhede, S. Kubera, Y. Verbelen, K. Wouters, and J. Genoe, "Secure Remote Reconfiguration of an FPGA-based Embedded System," In Workshop on Reconfigurable Communication-centric Systems-on-Chip 2011, D. Goehringer, G. Marchesan Almeida, G. Sassatelli, and L. Soares Indrusiak (eds.), IEEE, pp. 74-79, 2011.
18. D. Karaklajic, J. Fan, and I. Verbauwhede, "The Devil is in Details: A Safe-Error Attack on a Tiny ECC Processor ," COSIC internal report, 14 pages, 2011.
19. I. Verbauwhede, "Low Budget cryptography to enable wireless security (invited talk)," 4th ACM conference on Wireless network security (WiSec 2011), Hamburg, DE, 2011.
20. P. Jeurissen, "Drempelbeveiling mogelijk maken voor RFID," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 69 pages, 2011.
21. D. Karaklajic, J. Fan, and I. Verbauwhede, "Systematic Security Evaluation Method Agains C Safe-Error Attacks," In 4th IEEE International Symposium on Hardware-Oriented Security and Trust - HOST 2011, IEEE, pp. 63-66, 2011.
22. C. Li, "Anonymous Payment Mechanisms for Electric Car Infrastructure," Master thesis, Katholieke Universiteit Leuven, C. Diaz, J. Driesen, and I. Verbauwhede (promotors), 57 pages, 2011.
23. A. Das, M. Knezevic, S. Seys, and I. Verbauwhede, "Challenge-response based secure test wrapper for testing cryptographic circuits," In 16th International IEEE European Test Symposium 2011, Trondheim, Norway, IEEE Computer Society, 6 pages, 2011.
24. D. Singelée, S. Seys, L. Batina, and I. Verbauwhede, "The Communication and Computation Cost of Wireless Security - Extended Abstract," In Proceedings of the 4th ACM conference on Wireless network security (WiSec 2011), ACM, pp. 1-3, 2011.
25. I. Verbauwhede, and R. Maes, "Physically Unclonable Functions: Manufacturing variability as an unclonable device identifier," In Proceedings of the 2011st ACM Great Lakes symposium on VLSI (GLSVLSI 2011), ACM, pp. 455-460, 2011.
26. J. Fan, F. Vercauteren, and I. Verbauwhede, "Efficient Hardware Implementation of Fp-arithmetic for Pairing-Friendly Curves," IEEE Transactions on Computers pp(99), 11 pages, 2011.
27. M. Knezevic, K. Kobayashi, J. Ikegami, S. Matsuo, A. Satoh, U. Kocabas, J. Fan, T. Katashita, T. Sugawara, K. Sakiyama, I. Verbauwhede, K. Ohta, N. Homma, and T. Aoki, "Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates," IEEE Transactions on Very Large Scale Integration (VLSI) Systems PP(99), pp. 1-13, 2011.
28. I. Verbauwhede, and K. Tiri, "Logic system for DPA resistance and/or side channel attack resistance", Patent number 7,924,057, The Regents of the University of California (applicant), 2011.
29. M. Knezevic, "Efficient Hardware Implementations of Cryptographic Primitives," PhD thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), 208 pages, 2011.
30. D. Karaklajic, J. Fan, J. Schmidt, and I. Verbauwhede, "Low-cost Fault Detection Method for ECC using Montgomery Powering Ladder," In Design, Automation and Test in Europe (DATE 2011), IEEE, pp. 1016-1021, 2011.
31. G. Hospodar, E. De Mulder, B. Gierlichs, J. Vandewalle, and I. Verbauwhede, "Least Squares Support Vector Machines for Side-Channel Analysis," In 2nd Workshop on Constructive Side-Channel Analysis and Secure Design , CASED, 6 pages, 2011.
32. I. Verbauwhede, "Design and design methods for embedded security (invited)," Tetra closing event - STRES project, Diepenbeek, Belgium, 2011.
33. B. Gierlichs, "Statistical and Information-Theoretic Methods for Power Analysis on Embedded Cryptography," PhD thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 161+27 pages, 2011.
2010
1. H. Devos, J. Van Campenhout , I. Verbauwhede, and D. Stroobandt, "Constructing application-specific memory hierarchies on FPGAs," LNCS Transactions on High-Performance Embedded Architectures and Compilers 3(3), pp. 1-16, 2010.
2. N. Mentens, J. Vliegen, A. Braeken, A. Touhafi, I. Verbauwhede, and K. Wouters, "Secure remote reconfiguration of FPGAs," In Dynamically Reconfigurable Architectures, Dagstuhl Seminar Proceedings 10281, P. M. Athanas, J. Becker, J. Teich, and I. Verbauwhede (eds.), IBFI, 4 pages, 2010.
3. "Dynamically Reconfigurable Architectures", Dagstuhl Seminar Proceedings 10281, P. M. Athanas, J. Becker, J. Teich, and I. Verbauwhede (eds.), IBFI, 2010.
4. M. Knezevic, F. Vercauteren, and I. Verbauwhede, "Faster Interleaved Modular Multiplication Based on Barrett and Montgomery Reduction Methods," IEEE Transactions on Computers 59(12), pp. 1715-1721, 2010.
5. A. Das, M. Knezevic, S. Seys, and I. Verbauwhede, "Challenge-response based secure test wrapper for testing cryptographic circuits," 5th Benelux Workshop on Information and System Security (WISSec 2010), Nijmegen, NL, 2010.
6. E. De Mulder, "Electromagnetic Techniques and Probes for Side-Channel Analysis on Cryptographic Devices," PhD thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 170+40 pages, 2010.
7. L. Batina, Y. K. Lee, S. Seys, D. Singelée, and I. Verbauwhede, "Short Paper: Privacy-preserving ECC-based grouping proofs for RFID," In Information Security - 13th International Conference, ISC 2010, Lecture Notes in Computer Science 6531, M. Burmester, S. Magliveras, and G. Tsudik (eds.), Springer-Verlag, pp. 159-165, 2010.
8. B. Ansari, and I. Verbauwhede, "A hybrid scheme for concurrent error detection of multiplication over finite fields," In IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, IEEE Computer Society, IEEE, pp. 399-407, 2010.
9. B. Ansari, and I. Verbauwhede, "FO4-based Models for Area, Delay and Energy of Polynomial Multiplication over Binary Fields," In IEEE Workshop on Signal Processing Systems: Design and Implementation (SIPS 2010), IEEE, pp. 420-425, 2010.
10. M. Knezevic, L. Batina, E. De Mulder, J. Fan, B. Gierlichs, Y. K. Lee, R. Maes, and I. Verbauwhede, "Signal Processing for Cryptography and Security Applications," In Handbook of Signal Processing Systems, S. S. Bhattacharyya, E. F. Deprettere, R. Leupers, and J. Takala (eds.), Springer, pp. 161-177, 2010.
11. D. Karaklajic, M. Knezevic, and I. Verbauwhede, "Multiplier Based Built In Self Test for Cryptographic Applications," COSIC Technical Report, 8 pages, 2010.
12. J. Fan, D. V. Bailey, L. Batina, T. Guneysu, C. Paar, and I. Verbauwhede, "Breaking Elliptic Curves Cryptosystems using Reconfigurable Hardware," In 2010th International Conference on Field Programmable Logic and Applications (FPL 2010), IEEE, pp. 133-138, 2010.
13. S. Matsuo, M. Knezevic, P. Schaumont, I. Verbauwhede, A. Satoh, K. Sakiyama, and K. Ohta, "How Can We Conduct Fair and Consistent Hardware Evaluation for SHA-3 Candidate?�Fair and Consistent� Hardware Evaluation for SHA-3 Candidate?F," In SHA-3 NIST conference, 15 pages, 2010.
14. D. Karaklajic, M. Knezevic, and I. Verbauwhede, "Low Cost Built-In Self Test for Public Key Crypto Cores," In International Workshop on Fault Diagnosis and Tolerance in Cryptography 2010, IEEE, pp. 97-103, 2010.
15. Y. K. Lee, L. Batina, D. Singelée, B. Preneel, and I. Verbauwhede, "Anti-counterfeiting, Untraceability and Other Security Challenges for RFID systems: Public-Key Based Protocols and Hardware," In Towards Hardware-Intrinsic Security, D. Naccache, and A. Sadeghi (eds.), Springer, pp. 243-264, 2010.
16. R. Maes, and I. Verbauwhede, "Physically Unclonable Functions: a Study on the State of the Art and Future Research Directions," In Towards Hardware-Intrinsic Security, D. Naccache, and A. Sadeghi (eds.), Springer, 36 pages, 2010.
17. J. Balasch, A. Rial, C. Troncoso, C. Geuens, B. Preneel, and I. Verbauwhede, "PrETP: Privacy-Preserving Electronic Toll Pricing," In 19th USENIX Security Symposium 2010, Usenix, pp. 63-78, 2010.
18. J. Vliegen, N. Mentens, J. Genoe, A. Braeken, S. Kubera, A. Touhafi, and I. Verbauwhede, "A compact FPGA-based architecture for elliptic curve cryptography over prime fields," In 21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2010), IEEE, pp. 313-316, 2010.
19. Ü. Kocabas, J. Fan, and I. Verbauwhede, "Implementation of Binary Edwards Curves for very-constrained Devices," In 2010th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2010), IEEE, pp. 185-191, 2010.
20. J. Delvaux, "Een efficiënte hardware-implementatie van het McEliece publieke sleutel cryptosysteem," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), 119 pages, 2010.
21. M. Knezevic, F. Vercauteren, and I. Verbauwhede, "Speeding Up Bipartite Modular Multiplication," In International Workshop on the Arithmetic of Finite Fields (WAIFI 2010), Lecture Notes in Computer Science 6087, A. Hasan, and T. Helleseth (eds.), Springer-Verlag, pp. 166-179, 2010.
22. I. Verbauwhede, "Compact crypto implementations for embedded security," BCRYPT and IEEE Benelux Embedded Systems Chapter Symposium on Embedded Security, Leuven, Belgium, 2010.
23. R. Maes, and I. Verbauwhede, "A Discussion on the Properties of Physically Unclonable Functions," TRUST 2010 Workshop on Security Hardware, Berlin, DE, 2010.
24. A. Prinsier, "Goedkope bescherming van intellectuele eigendom in FPGA-configuraties," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), 73 pages, 2010.
25. I. Verbauwhede, "Smart Grid, Security and EDA," DAC workshop on synergies between design automation and smart grid, Anaheim, CA, USA, 2010.
26. B. Vandersmissen, "Beveiligingsanalyse van RFID gebaseerde toegangscontrole," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 72 pages, 2010.
27. J. Fan, X. Guo, E. De Mulder, P. Schaumont, B. Preneel, and I. Verbauwhede, "State-of-the-art of secure ECC implementations: a survey on known side-channel attacks and countermeasures," In 3rd IEEE International Symposium on Hardware-Oriented Security and Trust - HOST 2010, IEEE, pp. 76-87, 2010.
28. K. Kobayashi, J. Ikegami, M. Knezevic, X. Guo, S. Matsuo, S. Huang, L. Nazhandali, U. Kocabas, J. Fan, A. Satoh, I. Verbauwhede, K. Sakiyama, and K. Ohta, "Prototyping Platform for Performance Evaluation of SHA-3 Candidates," In 3rd IEEE International Symposium on Hardware-Oriented Security and Trust - HOST 2010, IEEE, pp. 60-63, 2010.
29. I. Verbauwhede, and K. Tiri, "Dynamic and differential CMOS logic with signal-independent power consumption to withstand differential power analysis - Divisional patent", Patent number 7,692,449, The Regents of the University of California (applicant), 2010.
30. Y. K. Lee, L. Batina, D. Singelée, and I. Verbauwhede, "Wide-Weak Privacy-Preserving RFID Authentication Protocols," In International Conference on Mobile Lightweight Wireless Systems, Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering 45, J. Alonso-Zarate, and O. Hoffmann (eds.), Springer-Verlag, pp. 254-267, 2010.
31. Y. K. Lee, L. Batina, D. Singelée, and I. Verbauwhede, "Low-Cost Untraceable Authentication Protocols for RFID," In Proceedings of the 3rd ACM conference on Wireless network security (WiSec 2010), C. Nita-Rotaru, and F. Stajano (eds.), ACM, pp. 55-64, 2010.
32. J. Balasch, I. Verbauwhede, and B. Preneel, "An Embedded Platform for Privacy-Friendly Road Charging Applications," In Design, Automation and Test in Europe (DATE 2010), IEEE, pp. 867-872, 2010.
33. B. Gierlichs, L. Batina, B. Preneel, and I. Verbauwhede, "Revisiting Higher-Order DPA Attacks: Multivariate Mutual Information Analysis," In Topics in Cryptology - CT-RSA 2010, The Cryptographers' Track at the RSA Conference, Lecture Notes in Computer Science 5985, J. Pieprzyk (ed.), Springer-Verlag, pp. 221-234, 2010.
34. L. Batina, K. Sakiyama, and I. Verbauwhede, "Compact Public Key implementations for RFID and sensor nodes," In Secure Integrated Circuits and Systems, Integrated Circuits and Systems, I. Verbauwhede (ed.), Springer, pp. 179-195, 2010.
35. Y. K. Lee, M. Knezevic, and I. Verbauwhede, "Hardware design for Hash functions," In Secure Integrated Circuits and Systems, Integrated Circuits and Systems, I. Verbauwhede (ed.), Springer, pp. 79-104, 2010.
36. "Secure Integrated Circuits and Systems", Integrated Circuits and Systems, I. Verbauwhede (ed.), Springer, 246 pages, 2010.
2009
1. M. Sterckx, B. Gierlichs, B. Preneel, and I. Verbauwhede, "Efficient Implementation of Anonymous Credentials on Java Card Smart Cards," In 1st IEEE International Workshop on Information Forensics and Security (WIFS 2009), IEEE, pp. 106-110, 2009.
2. E. De Mulder, B. Gierlichs, B. Preneel, and I. Verbauwhede, "Practical DPA Attacks on MDPL," In 1st IEEE International Workshop on Information Forensics and Security (WIFS 2009), IEEE, pp. 191-195, 2009.
3. I. Verbauwhede, "Hardware benchmarking for HASH3 (for non hardware designers)," ECRYPT-II workshop: HASH3: Proofs, Analysis and Implementation, Tenerife, Spain, 2009.
4. J. Fan, L. Batina, and I. Verbauwhede, "Light-weight implementation options for curve-based cryptography: HECC is also ready for RFID," In International workshop on RFID Security and Cryptography - RISC 2009, pp. 1-6, 2009.
5. A. Sadeghi, I. Verbauwhede, and C. Vishik, "Future of Assurance: Ensuring that a System is Trustworthy," In Highlights of the Information Security Solutions Europe 2009 Conference (ISSE 2009), Vieweg, pp. 339-348, 2009.
6. Y. K. Lee, L. Batina, and I. Verbauwhede, "Secure communication protocols for RFID systems," COSIC internal report, 9 pages, 2009.
7. I. Verbauwhede, "Public Key for RFID: from security protocols to silicon implementation," ECRYPT-II workshop on cryptology: progress and challenges, Leuven, Belgium, 2009.
8. R. Maes, P. Tuyls, and I. Verbauwhede, "Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs," In Cryptographic Hardware and Embedded Systems - CHES 2009, Lecture Notes in Computer Science 5747, C. Clavier, and K. Gaj (eds.), Springer-Verlag, pp. 332-347, 2009.
9. J. Fan, F. Vercauteren, and I. Verbauwhede, "Faster Fp-arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves," In Cryptographic Hardware and Embedded Systems - CHES 2009, Lecture Notes in Computer Science 5747, C. Clavier, and K. Gaj (eds.), Springer-Verlag, pp. 240-253, 2009.
10. X. Guo, J. Fan, P. Schaumont, and I. Verbauwhede, "Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security," In Cryptographic Hardware and Embedded Systems - CHES 2009, Lecture Notes in Computer Science 5747, C. Clavier, and K. Gaj (eds.), Springer-Verlag, pp. 289-303, 2009.
11. Y. K. Lee, L. Batina, and I. Verbauwhede, "Privacy challenges in RFID systems," In 20th Tyrrhenian Workshop on Digital Communications: The Internet of things, Springer, pp. 395-405, 2009.
12. V. Rozic, and I. Verbauwhede, "Random Numbers Generation: Investigation of Narrow Transitions Suppression on FPGA," In 19th International Conference on Field Programmable Logic and Applications (FPL 2009), IEEE, 4 pages, 2009.
13. B. Gierlichs, E. De Mulder, B. Preneel, and I. Verbauwhede, "Empirical Comparison of Side Channel Analysis Distinguishers on DES in Hardware," In European Conference on Circuit Theory and Design (ECCTD 2009), IEEE, pp. 391-394, 2009.
14. M. Knezevic, and I. Verbauwhede, "Hardware Evaluation of the Luffa Hash Family," In Workshop on Embedded Systems Security - WESS 2009, 6 pages, 2009.
15. Ü. Kocabas, "Hardware Implementations of ECC over a Binary Edwards Curve," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), pp. 1-70, 2009.
16. J. Fan, and I. Verbauwhede, "Hyperelliptic curve processor for RFID tags," In Workshop on RFID Security 2009, Lecture Notes in Computer Science, Springer-Verlag, 10 pages, 2009.
17. M. Sterckx, "Implementation and Side-Channel Analysis of Anonymous Credentials on Java Card Platforms," Master thesis, Katholieke Universiteit Leuven, K. C. Posch, B. Preneel, and I. Verbauwhede (promotors), pp. 1-79, 2009.
18. J. Jacobs, "Flexibele aansturing voor ISO-7816," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), pp. 1-75, 2009.
19. K. De Craemer, "Geavanceerde vermogenmeetsetup voor vermogensanalyseaanvallen," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), pp. 1-73, 2009.
20. S. Li, and H. Zhao, "Power Analysis Attacks on a Hardware Implementation of the Stream Cipher Mickey," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), pp. 1-67, 2009.
21. J. Fan, M. Knezevic, D. Karaklajic, R. Maes, V. Rozic, L. Batina, and I. Verbauwhede, "FPGA-based Testing Strategy for Cryptographic Chips: A Case Study on Elliptic Curve Processor for RFID Tags," In 15th IEEE International On-Line Testing Symposium (IOLTS 2009), IEEE, pp. 189-191, 2009.
22. W. Aerts, "Application Specificities of Array Antennas: Satellite Communication and Electromagnetic Side Channel Analysis (Toepassingsspecificiteiten bij roosterantennes: satellietcommunicatie en elektromagnetische nevenkanaalsanalyse)," PhD thesis, Katholieke Universiteit Leuven, P. Coppin, G. Vandenbosch, and I. Verbauwhede (promotors), 277+44 pages, 2009.
23. R. Maes, D. Schellekens, P. Tuyls, and I. Verbauwhede, "Analysis and Design of Active IC Metering Schemes," In 2nd IEEE International Symposium on Hardware-Oriented Security and Trust - HOST 2009, IEEE, pp. 74-81, 2009.
24. A. Van Herrewege, "Compacte implementaties van paringen," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 74 pages, 2009.
25. B. Coppens, I. Verbauwhede, B. De Sutter, and K. De Bosschere, "Practical Mitigations for Timing-Based Side-Channel Attacks on Modern x86 Processors," In IEEE Symposium on Security and Privacy (SP 2009) 30, D. Evans, and A. Myers (eds.), IEEE, pp. 1-11, 2009.
26. E. De Mulder, W. Aerts, B. Preneel, G. Vandenbosch, and I. Verbauwhede, "A class E Power Amplifier for ISO-14443A," In 12th IEEE Workshop on Design and Diagnostics of Electronic Circuits & Systems (DDECS 2009), IEEE, pp. 20-23, 2009.
27. Y. K. Lee, L. Batina, J. Fan, D. Karaklajic, M. Knezevic, U. Kocabas, V. Rozic, and I. Verbauwhede, "Tiny Public-Key Security Processor," ISSCC09 Student Forum, 4 pages, 2009.
28. R. Maes, P. Tuyls, and I. Verbauwhede, "A Soft Decision Helper Data Algorithm for SRAM PUFs," In IEEE International Symposium on Information Theory (ISIT 2009), IEEE, 5 pages, 2009.
29. M. Knezevic, L. Batina, and I. Verbauwhede, "Modular Reduction without Precomputational Phase," In IEEE International Symposium on Circuits and Systems (ISCAS 2009), IEEE, pp. 1389-1392, 2009.
30. Y. K. Lee, L. Batina, and I. Verbauwhede, "Untraceable RFID Authentication Protocols: Revision of EC-RAC," In IEEE International Conference on RFID 2009, IEEE, pp. 178-185, 2009.
31. W. Aerts, E. De Mulder, B. Preneel, G. Vandenbosch, and I. Verbauwhede, "'Designing Maximal Resolution Loop Sensors for Cryptographic Analysis," In 3rd European Conference on Antennas and Propagation (EuCAP 2009), IEEE, pp. 1-5, 2009.
2008
1. F. Standaert, B. Gierlichs, and I. Verbauwhede, "Partition vs. Comparison Side-Channel Distinguishers," In Information Security and Cryptology - ICISC 2008: 11th International Conference, Lecture Notes in Computer Science 5461, J. Hee Cheon, and P. Lee (eds.), Springer-Verlag, pp. 253-267, 2008.
2. W. Aerts, E. De Mulder, B. Preneel, G. Vandenbosch, and I. Verbauwhede, "Dependence of RFID Reader Antenna Design on Read Out Distance," IEEE Transactions on Antennas & Propagation 56(12), pp. 3829-3837, 2008.
3. N. Mentens, D. Schellekens, W. Heedfeld, P. Timmermans, and I. Verbauwhede, "Comparison of two Random Number Generators on an FPGA," In ProRISC workshop, 3 pages, 2008.
4. M. Knezevic, V. Rozic, and I. Verbauwhede, "Design Methods for Embedded Security," In Telecommunications Forum (TELFOR 2008), 4 pages, 2008.
5. R. Maes, P. Tuyls, and I. Verbauwhede, "Intrinsic PUFs from Flip-flops on Reconfigurable Devices," In 3rd Benelux Workshop on Information and System Security (WISSec 2008), 17 pages, 2008.
6. Y. K. Lee, L. Batina, K. Sakiyama, and I. Verbauwhede, "Elliptic Curve Based Security Processor for RFID," IEEE Transactions on Computers 57(11), pp. 1514-1527, 2008.
7. Y. K. Lee, H. Chan, and I. Verbauwhede, "Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class," Journal of Signal Processing Systems 53(1-2), pp. 89-102, 2008.
8. J. Fan, and I. Verbauwhede, "A digit-serial architecture for inversion and multiplication in GF(2m)," In IEEE Workshop on Signal Processing Systems: Design and Implementation (SIPS 2008), IEEE, pp. 7-12, 2008.
9. S. Goeminne, and I. Verbauwhede, "Cryptodinges", Lannoo, 64 pages, 2008.
10. L. Batina, J. Guajardo, B. Preneel, P. Tuyls, and I. Verbauwhede, "Public-Key Cryptography for RFID Tags and Applications," In RFID Security: Techniques,Protocols and System-On-Chip Design, P. Kitsos, and Y. Zhang (eds.), Springer-Verlag, pp. 317-348, 2008.
11. I. Verbauwhede, and K. Tiri, "Dynamic and differential CMOS logic with signal-independent power consumption to withstand differential power analysis", Patent number 7,417,468, The Regents of the University of California (applicant), 2008.
12. J. Fan, L. Batina, and I. Verbauwhede, "HECC Goes Embedded: An Area-efficient Implementation of HECC," In Selected Areas in Cryptography, 15th Annual International Workshop, SAC 2008, Lecture Notes in Computer Science 5381, R. Avanzi, L. Keliher, and F. Sica (eds.), Springer-Verlag, pp. 387--400, 2008.
13. A. Georges, L. Uhsadel, and I. Verbauwhede, "Exploiting Hardware Performance Counters," In International Workshop on Fault Diagnosis and Tolerance in Cryptography 2008 IEEE, IEEE, pp. 59-67, 2008.
14. N. Mentens, B. Gierlichs, and I. Verbauwhede, "Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration," In Cryptographic Hardware and Embedded Systems - CHES 2008, Lecture Notes in Computer Science 5154, E. Oswald, and P. Rohatgi (eds.), Springer-Verlag, pp. 346-362, 2008.
15. M. Knezevic, V. Velichkov, B. Preneel, and I. Verbauwhede, "On the Practical Performance of Rateless Codes," In International Conference on Wireless Information Networks and Systems, 4 pages, 2008.
16. J. Kim, B. Lai, F. Chang, and I. Verbauwhede, "A Cost-Effective Latency-Aware memory Bus for Shared Memory Multi-core Systems," IEEE Transactions on Computers 57(12), pp. 1714-1719, 2008.
17. A. C. Atici, L. Batina, B. Gierlichs, and I. Verbauwhede, "Power analysis on NTRU implementations for RFIDs: First results," In Workshop on RFID Security 2008, Lecture Notes in Computer Science, Springer-Verlag, 11 pages, 2008.
18. M. Knezevic, K. Sakiyama, J. Fan, and I. Verbauwhede, "Modular Reduction in GF(2^n) Without Pre-Computational Phase," In International Workshop on the Arithmetic of Finite Fields (WAIFI 2008), Lecture Notes in Computer Science 5130, Ç. K. Koç, J. Luis Imana, and J. Von zur Gathen (eds.), Springer-Verlag, pp. 77-87, 2008.
19. D. Moortgat, "Ontwerp van een veilig garantiesysteem met RFID-tags," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), pp. 1-56, 2008.
20. O. Cortambert, "Hardware-software co-design of a cryptographic system," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), 77 pages, 2008.
21. J. Fan, and I. Verbauwhede, "Extended Abstract: Unified Digit-Serial Multiplier/Inverter in Finite Field GF (2^m)," In 1st IEEE International Symposium on Hardware-Oriented Security and Trust - HOST 2008, IEEE, pp. 72-75, 2008.
22. A. C. Atici, "Low cost NTRU implementations," Master thesis, Katholieke Universiteit Leuven, I. Verbauwhede (promotor), 47 pages, 2008.
23. L. Batina, S. Seys, B. Preneel, and I. Verbauwhede, "Public-key Primitives," In Wireless Sensor Network Security, J. Lopez, and J. Zhou (eds.), IOS Press, pp. 77-109, 2008.
24. G. Van Damme, "Symmetrische versleuteling voor RFID-Tags," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 80 pages, 2008.
25. B. Gierlichs, C. Troncoso, C. Diaz, B. Preneel, and I. Verbauwhede, "Revisiting A Combinatorial Approach Toward Measuring Anonymity," In Proceedings of the 7th ACM workshop on Privacy in the electronic society (WPES 2008), V. Atluri , and M. Winslett (eds.), ACM, pp. 111-116, 2008.
26. H. Chan, V. Casado A., J. Basak, M. Griot, W. Weng, R. Wesel, B. Jalali, E. Yablonovitch, and I. Verbauwhede, "Demonstration of Uncoordinated Multiple Access in Optical Communications," IEEE Transactions on Circuits and Systems I: Regular Papers 55(10), pp. 3259-3269, 2008.
27. Y. K. Lee, L. Batina, and I. Verbauwhede, "EC-RAC (ECDLP Based Randomized Access Control): Provably Secure RFID authentication protocol," In IEEE International Conference on RFID 2008, IEEE, pp. 97-104, 2008.
28. C. Clavier, B. Gierlichs, and I. Verbauwhede, "Fault Analysis Study of IDEA," In Topics in Cryptology - CT-RSA 2008, The Cryptographers' Track at the RSA Conference, Lecture Notes in Computer Science 4964, T. Malkin (ed.), Springer-Verlag, pp. 274-287, 2008.
29. R. Maes, P. Tuyls, and I. Verbauwhede, "Statistical Analysis of Silicon PUF responses for Device Identification," In Workshop on Secure Component and System Identification (SECSI 2008), 16 pages, 2008.
30. J. Fan, L. Batina, K. Sakiyama, and I. Verbauwhede, "FPGA Design for Algebraic Tori Based Public Key Cryptography," In Design, Automation and Test in Europe (DATE 2008), IEEE, pp. 1292-1297, 2008.
31. C. Troncoso, B. Gierlichs, B. Preneel, and I. Verbauwhede, "Perfect Matching Disclosure Attacks," In Privacy Enhancing Technologies - 8th International Symposium, PETS 2008, Lecture Notes in Computer Science 5134, N. Borisov, and I. Goldberg (eds.), Springer-Verlag, pp. 2-23, 2008.
32. N. Mentens, J. Genoe, B. Preneel, and I. Verbauwhede, "A low-cost implementation of Trivium," In ECRYPT Workshop, SASC - The State of the Art of Stream Ciphers, C. De Cannière, and O. Dunkelman (eds.), pp. 197-204, 2008.
33. A. C. Atici, L. Batina, J. Fan, I. Verbauwhede, and S. B. Örs, "Low-cost Implementations of NTRU for pervasive security," In 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2008), IEEE, pp. 79-84, 2008.
34. M. Knezevic, K. Sakiyama, Y. K. Lee, and I. Verbauwhede, "On the High-Throughput Implementation of RIPEMD-160 Hash Algorithm," In 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2008), IEEE, pp. 85-90, 2008.
2007
1. K. Sakiyama, "Secure Design Methodology and Implementation for Embedded Public-key Cryptosystems," PhD thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 171+xxii pages, 2007.
2. I. Verbauwhede, "Tutorial - Part II: Countermeasures to Side-Channel attacks," INDOCRYPT 2007, Chennai, India, 2007.
3. I. Verbauwhede, "Tutorial - Part I: Introduction to Side-Channel Attacks," INDOCRYPT 2007, Chennai, India, 2007.
4. R. Maes, "Sleutelextractie van een Silicon-PUF op FPGA," Master thesis, Katholieke Universiteit Leuven, P. Tuyls, and I. Verbauwhede (promotors), 96 pages, 2007.
5. I. Albisu Zufiaurre, "Protocols for privacy for RFID tags," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 60 pages, 2007.
6. S. Beeckman, "Vergelijkende studie van de efficientië van publieke-sleutelalgoritmen," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 78+8 pages, 2007.
7. J. Fan, K. Sakiyama, and I. Verbauwhede, "Montgomery Modular Multiplication Algorithm on Multi-Core Systems," In IEEE Workshop on Signal Processing Systems: Design and Implementation (SIPS 2007), IEEE, pp. 261-266, 2007.
8. K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "High-performance Public-key Cryptoprocessor for Wireless Mobile Applications," Mobile Networks and Applications 12(4), pp. 245-258, 2007.
9. J. Fan, K. Sakiyama, and I. Verbauwhede, "Elliptic Curve Cryptography on Embedded Multicore Systems," In Workshop on Embedded Systems Security - WESS 2007, pp. 17-22, 2007.
10. E. De Mulder, S. B. Örs, B. Preneel, and I. Verbauwhede, "Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems," Computers & Electrical Engineering 33(5-6), pp. 367-382, 2007.
11. K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "HW/SW Co-design for Public-Key Cryptosystems on the 8051 Micro-controller," Computers & Electrical Engineering 33(5-6), pp. 324-332, 2007.
12. "Cryptographic Hardware and Embedded Systems - CHES 2007", Lecture Notes in Computer Science 4727, P. Paillier, and I. Verbauwhede (eds.), Springer-Verlag, 2007.
13. K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "Multi-core Curve-based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2^n)," IEEE Transactions on Computers 56(9), pp. 1269-1282, 2007.
14. Y. K. Lee, H. Chan, and I. Verbauwhede, "Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384,512) for Hardware Implementations," In Information Security Applications, 8th International Workshop, WISA 2007, Lecture Notes in Computer Science 4867, S. Kim, H. Lee, and M. Yung (eds.), Springer-Verlag, pp. 102-114, 2007.
15. Y. K. Lee, and I. Verbauwhede, "A Compact Architecture for Montgomery Elliptic Curve Scalar Multiplication Processor," In Information Security Applications, 8th International Workshop, WISA 2007, Lecture Notes in Computer Science 4867, S. Kim, H. Lee, and M. Yung (eds.), Springer-Verlag, pp. 115-127, 2007.
16. E. F. Deprettere, R. Woods, I. Verbauwhede, and E. de Kock, "Editorial: Transforming Signal Processing Applications into Parallel Implementations," EURASIP Journal on Applied Signal Processing 2007(2), pp. 25-25, 2007.
17. J. Kim, F. Chang, and I. Verbauwhede, "Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication," IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15(8), pp. 881-894, 2007.
18. N. Mentens, K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "A side-channel attack resistant programmable PKC coprocessor for embedded applications," In International Conference on Systems, Architectures, MOdeling and Simulation (IC-SAMOS 2007), IEEE, pp. 194-200, 2007.
19. N. Mentens, "Secure and Efficient Coprocessor Design for Cryptographic Applications on FPGAs," PhD thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 138+20 pages, 2007.
20. J. Fan, K. Sakiyama, and I. Verbauwhede, "Montgomery Modular Multiplication Algorithm for Multi-Core Systems," In ECRYPT Workshop, SPEED - Software Performance Enhancement for Encryption and Decryption 2007, pp. 77-92, 2007.
21. L. Batina, N. Mentens, K. Sakiyama, B. Preneel, and I. Verbauwhede, "Public-Key Cryptography on the Top of a Needle," In IEEE International Symposium on Circuits and Systems (ISCAS 2007), IEEE, pp. 1831-1834, 2007.
22. I. Verbauwhede, and P. Schaumont, "Design methods for security and trust," In Design, Automation and Test in Europe (DATE 2007), IEEE, pp. 1-6, 2007.
23. S. Yang, and I. Verbauwhede, "Secure IRIS Verification," In IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2007), IEEE, pp. II-133-II-136, 2007.
24. L. Batina, J. Guajardo, T. Kerins, N. Mentens, P. Tuyls, and I. Verbauwhede, "Public-Key Cryptography for RFID-Tags," In IEEE International Workshop on Pervasive Computing and Communication Security (PerSec 2007), IEEE, pp. 217-222, 2007.
25. K. Sakiyama, E. De Mulder, B. Preneel, and I. Verbauwhede, "Side-channel Resistant System-level Design Flow for Public-key Cryptography," In Proceedings of the 17th ACM Great Lakes symposium on VLSI (GLSVLSI 2007), ACM, pp. 144-147, 2007.
26. I. Verbauwhede, P. Schaumont, D. Hwang, B. Lai, S. Yang, K. Sakiyama, Y. Fan, and A. Hodjat, "System for biometric signal processing with hardware and software acceleration", Patent number Pub US 2007-0038867 A1, The Regents of the University of California (applicant), 2007.
27. P. Schaumont, and I. Verbauwhede, "Hardware/software co-design for stream ciphers," In ECRYPT Workshop, SASC - The State of the Art of Stream Ciphers, pp. 106-116, 2007.
28. K. Sakiyama, N. Mentens, L. Batina, B. Preneel, and I. Verbauwhede, "Reconfigurable Modular Arithmetic Logic Unit Supporting High-performance RSA and ECC over GF(p)," International Journal of Electronics 94(5), pp. 501-514, 2007.
29. N. Mentens, K. Sakiyama, B. Preneel, and I. Verbauwhede, "Efficient Pipelining for Modular Multiplication Architectures in Prime Fields," In Proceedings of the 17th ACM Great Lakes symposium on VLSI (GLSVLSI 2007), ACM, pp. 534-539, 2007.
2006
1. J. Kim, I. Verbauwhede, and F. Chang, "Capacitively coupled pulsed signaling bus interface", Patent number Pub US 2006-0290377 A1, The Regents of the University of California (applicant), 2006.
2. L. Batina, J. Guajardo, T. Kerins, N. Mentens, P. Tuyls, and I. Verbauwhede, "An Elliptic Curve Processor Suitable For RFID-Tags," In 1st Benelux Workshop on Information and System Security (WISSec 2006), 14 pages, 2006.
3. W. Aerts, E. De Mulder, B. Preneel, G. Vandenbosch, and I. Verbauwhede, "Matching shielded loops for cryptographic analysis," In 1st European Conference on Antennas and Propagation (EuCAP 2006), IEEE, pp. 1-6, 2006.
4. P. Schaumont, D. Hwang, S. Yang, and I. Verbauwhede, "Multi-level Design Validation in a Secure Embedded System," IEEE Transactions on Computers 55(11), pp. 1380-1390, 2006.
5. K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "Superscalar Coprocessor for High-speed Curve-based Cryptography," In Cryptographic Hardware and Embedded Systems - CHES 2006, Lecture Notes in Computer Science 4249, L. Goubin, and M. Matsui (eds.), Springer-Verlag, pp. 415-429, 2006.
6. A. Hodjat, L. Batina, D. Hwang, and I. Verbauwhede, "HW/SW Co-Design of a Hyperelliptic Curve Cryptosystem using a Microcode Instruction Set Coprocessor," Integration, the VLSI Journal 40(1), pp. 45-51, 2006.
7. L. Batina, N. Mentens, K. Sakiyama, B. Preneel, and I. Verbauwhede, "Low-cost Elliptic Curve Cryptography for wireless sensor networks," In Security and Privacy in Ad-hoc and Sensor Networks - 3rd European Workshop, ESAS 2006, Lecture Notes in Computer Science 4357, L. Buttyan, V. Gligor, and D. Westhoff (eds.), Springer-Verlag, pp. 6-17, 2006.
8. H. Chan, M. Griot, A. Vila Casado, R. Wesel, and I. Verbauwhede, "High Speed Channel Coding Architectures for the Uncoordinated OR Channel," In 17th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2006), IEEE, pp. 265-268, 2006.
9. Y. K. Lee, H. Chan, and I. Verbauwhede, "Throughput Optimized SHA-1 Architecture Using Unfolding Transformation," In 17th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2006), IEEE, pp. 354-359, 2006.
10. B. Lai, P. Schaumont, W. Qin, and I. Verbauwhede, "Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip," In 17th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2006), IEEE, pp. 15-18, 2006.
11. P. Schaumont, and I. Verbauwhede, "A Component-Based Design Environment for ESL Design," IEEE Design & Test of Computers 23(5), pp. 338-347, 2006.
12. L. Batina, A. Hodjat, D. Hwang, K. Sakiyama, and I. Verbauwhede, "Reconfigurable architectures for curve-based cryptography on embedded micro-controllers," In 16th International Conference on Field Programmable Logic and Applications (FPL 2006), IEEE, pp. 1-4, 2006.
13. N. Mentens, K. Sakiyama, L. Batina, I. Verbauwhede, and B. Preneel, "FPGA-oriented Secure Data Path Design: Implementation of a Public KeyCoprocessor," In 16th International Conference on Field Programmable Logic and Applications (FPL 2006), IEEE, pp. 133-138, 2006.
14. D. Schellekens, B. Preneel, and I. Verbauwhede, "FPGA vendor agnostic True Random Number Generator," In 16th International Conference on Field Programmable Logic and Applications (FPL 2006), IEEE, pp. 139-144, 2006.
15. K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "HW/SW Co-design for Accelerating Public-Key Cryptosystems over GF(p) on the 8051 μ-controller," In World Automation Congress (WAC 2006), IEEE, pp. 1-6, 2006.
16. E. De Mulder, S. B. Örs, B. Preneel, and I. Verbauwhede, "Differential Electromagnetic Attack on an FPGA," In World Automation Congress (WAC 2006), IEEE, pp. 1-7, 2006.
17. K. Tiri, and I. Verbauwhede, "A Digital Design Flow for Secure Integrated Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25(7), pp. 1197-1208, 2006.
18. J. Van Belle, "Aspecten van elektromagnetische nevenkanaalaanvallen op cryptografische chips vanop grote afstand," Master thesis, Katholieke Universiteit Leuven, G. Vandenbosch, and I. Verbauwhede (promotors), 69 pages, 2006.
19. S. Indesteege, "Cryptografische aspecten van nevenkanaalaanvallen op cryptografische chips," Master thesis, Katholieke Universiteit Leuven, G. Vandenbosch, and I. Verbauwhede (promotors), 70 pages, 2006.
20. H. Chan, P. Schaumont, and I. Verbauwhede, "Process isolation for Reconfigurable Hardware," In Proceedings International Conference on Engineering of Reconfigurable Systems and Algorithms, pp. 164-170, 2006.
21. M. Badaroglu, K. Tiri, G. Van der Plas, P. Wambacq, I. Verbauwhede, S. Donnay, G. Gielen, and H. De Man, "Clock Skew Optimization Methodology for Substrate Noise Reduction with Supply Current Folding," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25(6), pp. 1146-1154, 2006.
22. I. Verbauwhede, K. Tiri, D. Hwang, and P. Schaumont, "Circuits and design techniques for secure ICs resistant to side-channel attacks," In International Conference on IC Design and Technology - ICICDT 2006, IEEE, pp. 1-4, 2006.
23. L. Batina, N. Mentens, B. Preneel, and I. Verbauwhede, "Flexible Hardware Architectures for Curve-based Cryptography," In IEEE International Symposium on Circuits and Systems (ISCAS 2006), IEEE, pp. 4839-4842, 2006.
24. K. Sakiyama, B. Preneel, and I. Verbauwhede, "A Fast Dual-Field Modular Arithmetic Logic Unit and Its Hardware Implementation," In IEEE International Symposium on Circuits and Systems (ISCAS 2006), IEEE, pp. 787-790, 2006.
25. K. Sakiyama, E. De Mulder, B. Preneel, and I. Verbauwhede, "A Parallel Processing Hardware Architecture for Elliptic Curve Cryptosystems," In IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2006), IEEE, pp. III-904-III-907, 2006.
26. P. Schaumont, D. Ching, and I. Verbauwhede, "An interactive codesign environment for domain-specific coprocessors," ACM Transactions on Design Automation of Electronic Systems 11(1), pp. 70-87, 2006.
27. D. Hwang, P. Schaumont, K. Tiri, and I. Verbauwhede, "Securing embedded systems," IEEE Security & Privacy 4(2), pp. 40-49, 2006.
28. D. Hwang, K. Tiri, A. Hodjat, B. Lai, S. Yang, P. Schaumont, and I. Verbauwhede, "AES-Based Security Coprocessor IC in 0.18-um CMOS with Resistance to Differential Power Analysis Side-Channel Attacks," IEEE Journal of Solid-State Circuits 41(4), pp. 781-792, 2006.
29. A. Hodjat, and I. Verbauwhede, "Area-Throughput Trade-offs for Fully Pipelined 30 to 70Gbits/s AES Processors," IEEE Transactions on Computers 55(4), pp. 366-372, 2006.
30. K. Tiri, P. Schaumont, and I. Verbauwhede, "Side-channel leakage tolerant architectures," In 3rd International conference on Information Technology: New Generations, IEEE, pp. 205-209, 2006.
31. P. Buysschaert, E. De Mulder, P. Delmotte, S. B. Örs, B. Preneel, G. Vandenbosch, and I. Verbauwhede, "Measuring the vulnerability of cryptographic algorithms," IEEE Potentials 25(2), pp. 13-17, 2006.
32. P. Schaumont, S. Shukla, and I. Verbauwhede, "Design using race-free hardware semantics," In Design, Automation and Test in Europe (DATE 2006), IEEE, pp. 571-576, 2006.
33. N. Mentens, L. Batina, B. Preneel, and I. Verbauwhede, "Time-memory trade-off attack on FPGA platforms: UNIX password cracking," In International Workshop on Applied Reconfigurable Computing (ARC2006), Lecture Notes in Computer Science 3985, K. Bertels, J. M. Cardoso, and S. Vassiliadis (eds.), Springer-Verlag, pp. 323-334, 2006.
34. K. Sakiyama, N. Mentens, L. Batina, B. Preneel, and I. Verbauwhede, "Reconfigurable Modular Arithmetic Logic Unit for High-performance Public-key Cryptosystems," In International Workshop on Applied Reconfigurable Computing (ARC2006), Lecture Notes in Computer Science 3985, K. Bertels, J. M. Cardoso, and S. Vassiliadis (eds.), Springer-Verlag, pp. 347-357, 2006.
35. M. Griot, A. Vila Casado, W. Weng, H. Chan, J. Basak, E. Yablonovitch, I. Verbauwhede, B. Jalali, and R. Wesel, "Interleaver-Division Multiple Access on the OR channel," In , 5 pages, 2006.
36. L. Batina, S. Kumar, J. Lano, K. Lemke-Rust, N. Mentens, C. Paar, B. Preneel, K. Sakiyama, and I. Verbauwhede, "Testing Framework for eSTREAM Profile II Candidates," In ECRYPT Workshop, SASC - The State of the Art of Stream Ciphers, 9 pages, 2006.
37. S. Yang, K. Sakiyama, and I. Verbauwhede, "Efficient and Secure Fingerprint Verification for Embedded Devices," EURASIP Journal on Applied Signal Processing 2006(2006), pp. 1-11, 2006.
38. L. Batina, J. Guajardo, T. Kerins, N. Mentens, P. Tuyls, and I. Verbauwhede, "Public Key Cryptography for RFID-Tags," In Workshop on RFID Security 2006, Lecture Notes in Computer Science, Springer-Verlag, 16 pages, 2006.
39. K. Sakiyama, L. Batina, N. Mentens, B. Preneel, and I. Verbauwhede, "Small-footprint ALU for public-key processors for pervasive security," In Workshop on RFID Security 2006, Lecture Notes in Computer Science, Springer-Verlag, 12 pages, 2006.
40. A. Hodjat, and I. Verbauwhede, "The Energy Cost of Embedded Security for Wireless Sensor Networks," In Sensor Network Operations, G. Griffin, T. La Porta, and S. Phoha (eds.), John Wiley & Sons, pp. 510-522, 2006.
2005
1. D. Hwang, P. Schaumont, S. Yang, and I. Verbauwhede, "Multilevel design validation in a secure embedded system," In 10th IEEE International High Level Design Validation and Test Workshop (HLDVT 2005), IEEE, pp. 203-210, 2005.
2. L. Batina, "Arithmetic and Architectures for Secure Hardware Implementations of Public-Key Cryptography," PhD thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 247 pages, 2005.
3. P. Schaumont, D. Hwang, and I. Verbauwhede, "Platform-based design for an embedded fingerprint authentication device," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 24(12), pp. 1929-1936, 2005.
4. P. Buysschaert, E. De Mulder, S. B. Örs, P. Delmotte, B. Preneel, G. Vandenbosch, and I. Verbauwhede, "Electromagnetic analysis attack on an FPGA implementation of an elliptic curve cryptosystem," In EUROCON 2005 - The International Conference on "Computer as a Tool", IEEE, pp. 1879-1882, 2005.
5. A. Hodjat, L. Batina, D. Hwang, and I. Verbauwhede, "A Hyperelliptic Curve Crypto Coprocessor for an 8051 Microcontroller," In IEEE Workshop on Signal Processing Systems: Design and Implementation (SIPS 2005), IEEE, pp. 93-98, 2005.
6. Y. K. Lee, and I. Verbauwhede, "Secure and Low-cost RFID Authentication Protocols," In 2nd IEEE International Workshop on Adaptive Wireless Networks (AWiN 2005), IEEE, pp. 1-5, 2005.
7. B. Lai, P. Schaumont, and I. Verbauwhede, "A Light-Weight Cooperative Multithreading with Hardware Supported Thread-Management on an Embedded Multi-Processor System," In 39th Asilomar Conference on Signals, Systems and Computers (ACSSC 2005), IEEE, pp. 1647-1651, 2005.
8. B. Lai, P. Schaumont, and I. Verbauwhede, "Energy and Performance Analysis of Mapping Parallel Multi-threaded Tasks for An On-Chip Multi-Processor System," In 23rd IEEE International Conference on Computer Design (ICCD 2005), IEEE, pp. 102-104, 2005.
9. L. Batina, N. Mentens, B. Preneel, and I. Verbauwhede, "Balanced point operations for side-channel protection of elliptic curve cryptography," IEE Proceedings - Information Security 152(1), pp. 57-65, 2005.
10. A. Braeken, J. Lano, N. Mentens, B. Preneel, and I. Verbauwhede, "SFINKS: A Synchronous Stream Cipher for Restricted Hardware Environments," In Symmetric Key Encryption Workshop, 19 pages, 2005.
11. K. Sakiyama, L. Batina, P. Schaumont, and I. Verbauwhede, "HW/SW Co-design for TA/SPA-resistant Public-Key Cryptosystems," In ECRYPT Workshop, CRASH - CRyptographic Advances in Secure Hardware, 8 pages, 2005.
12. S. Yang, P. Schaumont, and I. Verbauwhede, "Microcoded Coprocessor for Embedded Secure Biometric Authentication Systems," In 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2005), IEEE, pp. 130-135, 2005.
13. L. Batina, N. Mentens, B. Preneel, and I. Verbauwhede, "Side channel aware design: Algorithms and Architectures for Curve-based Cryptography over GF(2n)," In 16th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005), IEEE, pp. 350-355, 2005.
14. L. Batina, N. Mentens, and I. Verbauwhede, "Side-channel Issues for Designing Secure Hardware Implementations," In 11th IEEE International On-Line Testing Symposium (IOLTS 2005) IEEE, IEEE, pp. 118-121, 2005.
15. F. Chang, I. Verbauwhede, C. Chien, Z. Xu, J. Kim, J. Ko, Q. Gu, and B. Lai, "Advanced RF/baseband interconnect schemes for inter- and intra ULSI communications," IEEE Transaction on Electron Devices 52(7), pp. 1271-1285, 2005.
16. P. Schaumont, S. Shukla, and I. Verbauwhede, "Extended Abstract: A Race-free Hardware Modeling Language," In 3rd ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2005), IEEE, pp. 254-255, 2005.
17. J. Kim, I. Verbauwhede, and F. Chang, "A 5.6-mW 1-Gb/s/pair pulsed signaling transceiver for a fully AC coupled bus," IEEE Journal of Solid-State Circuits 40(6), pp. 1331-1340, 2005.
18. D. Ching, P. Schaumont, and I. Verbauwhede, "Integrated modeling and generation of a reconfigurable network-on-chip," International Journal of Embedded Systems (IJES) 1(3/4), pp. 218-227, 2005.
19. P. Schaumont, B. Lai, W. Qin, and I. Verbauwhede, "Cooperative multithreading on embedded multiprocessor architectures enables energy-scalable design," In 42nd Design Automation Conference (DAC 2005), IEEE, pp. 27-30, 2005.
20. K. Tiri, and I. Verbauwhede, "Simulation Models for Side-Channel Information Leaks," In 42nd Design Automation Conference (DAC 2005), IEEE, pp. 228-233, 2005.
21. K. Tiri, D. Hwang, A. Hodjat, B. Lai, S. Yang, P. Schaumont, and I. Verbauwhede, "A Side-Channel Leakage Free Coprocessor IC in 0.18um CMOS for Embedded AES-based Cryptographic and Biometric Processing," In 42nd Design Automation Conference (DAC 2005), IEEE, pp. 222-227, 2005.
22. K. Tiri, D. Hwang, A. Hodjat, B. Lai, S. Yang, P. Schaumont, and I. Verbauwhede, "AES-Based Cryptographic and Biometric Security Coprocessor IC in 0.18-um CMOS Resistant to Side-Channel Power Analysis Attacks," In 2005 Symposium on VLSI Circuits, pp. 216-219, 2005.
23. A. Hodjat, D. Hwang, and I. Verbauwhede, "A scalable and high performance elliptic curve processor with resistance to timing attacks," In International Conference on Information Technology: Coding and Computing (ITCC 2005), IEEE, pp. 538-543, 2005.
24. S. Yang, and I. Verbauwhede, "Automatic Secure Fingerprint Verification System Based on Fuzzy Vault Scheme," In IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2005), IEEE, pp. 609-612, 2005.
25. O. Villa, P. Schaumont, I. Verbauwhede, M. Monchiero, and G. Palermo, "Fast dynamic memory integration in co-simulation frameworks for multiprocessor system on-chip," In Design, Automation and Test in Europe (DATE 2005), IEEE, pp. 804-805, 2005.
26. K. Tiri, and I. Verbauwhede, "Design method for constant power consumption of differential logic circuits," In Design, Automation and Test in Europe (DATE 2005), IEEE, pp. 628-633, 2005.
27. K. Tiri, and I. Verbauwhede, "A VLSI design flow for secure side-channel attack resistant ICs," In Design, Automation and Test in Europe (DATE 2005), IEEE, pp. 58-63, 2005.
28. H. Chan, P. Schaumont, and I. Verbauwhede, "A secure multithreaded coprocessor interface," In Proc. 3rd Workshop on Optimizations for DSP and Embedded Systems, 8 pages pages, 2005.
29. N. Mentens, L. Batina, B. Preneel, and I. Verbauwhede, "Cracking Unix Passwords using FPGA Platforms," In ECRYPT Workshop, SHARCS - Special Purpose Hardware for Attacking Cryptographic Systems, pp. 83-91, 2005.
30. N. Mentens, L. Batina, B. Preneel, and I. Verbauwhede, "A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-box," In Topics in Cryptology - CT-RSA 2005, The Cryptographers' Track at the RSA Conference, Lecture Notes in Computer Science 3376, A. Menezes (ed.), Springer-Verlag, pp. 323-333, 2005.
31. S. B. Örs, "Hardware Design of Elliptic Curve Cryptosystems and Side-Channel Attacks," PhD thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 237 pages, 2005.
32. I. Verbauwhede, and P. Schaumont, "Skiing the embedded systems mountain," ACM Transactions on Embedded Computing Systems 4(3), pp. 529-548, 2005.
33. A. Hodjat, D. Hwang, B. Lai, K. Tiri, and I. Verbauwhede, "A 3.84 Gbits/s AES Crypto Coprocessor with Modes of Operation in a 0.18um CMOS Technology," In Proceedings of the 15th ACM Great Lakes symposium on VLSI (GLSVLSI 2005), ACM, pp. 60-63, 2005.
34. K. Tiri, D. Hwang, A. Hodjat, B. Lai, S. Yang, P. Schaumont, and I. Verbauwhede, "Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment," In Cryptographic Hardware and Embedded Systems - CHES 2005, Lecture Notes in Computer Science 3659, J. R. Rao, and B. Sunar (eds.), Springer-Verlag, pp. 354-365, 2005.
35. L. Batina, D. Hwang, A. Hodjat, B. Preneel, and I. Verbauwhede, "Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051 microprocessor," In Cryptographic Hardware and Embedded Systems - CHES 2005, Lecture Notes in Computer Science 3659, J. R. Rao, and B. Sunar (eds.), Springer-Verlag, pp. 106-118, 2005.
36. I. Verbauwhede, A. Hodjat, D. Hwang, and B. Lai, "Security for ambient intelligent systems," In Ambient Intelligence, E. Aarts, J. M. Rabaey, and W. Weber (eds.), Springer-Verlag, pp. 199-221, 2005.
2004
1. N. Mentens, L. Batina, B. Preneel, and I. Verbauwhede, "An FPGA Implementation of Rijndael: Trade-offs for side-channel security," In IFAC Workshop - PDS 2004, Programmable Devices and Systems, Elsevier, pp. 493-498, 2004.
2. D. Hwang, and I. Verbauwhede, "Design of portable biometric authenticators--energy, performance, and security tradeoffs," IEEE Transactions on Consumer Electronics 50(4), pp. 1222-1231, 2004.
3. L. Batina, P. Buysschaert, E. De Mulder, N. Mentens, B. Preneel, G. Vandenbosch, I. Verbauwhede, and S. B. Örs, "Side channel attacks and fault attacks on cryptographic algorithms," Revue HF Tijdschrift 2004(3), pp. 36-45, 2004.
4. B. Lai, P. Schaumont, and I. Verbauwhede, "CT-Bus: A heterogeneous CDMA/TDMA bus for future SOC," In 38th Asilomar Conference on Signals, Systems and Computers (ACSSC 2004), IEEE, pp. 1868-1872, 2004.
5. S. Yang, and I. Verbauwhede, "Secure fuzzy vault based fingerprint verification system," In 38th Asilomar Conference on Signals, Systems and Computers (ACSSC 2004), IEEE, pp. 577-581, 2004.
6. A. Hodjat, and I. Verbauwhede, "Interfacing a high speed crypto accelerator to an embedded CPU," In 38th Asilomar Conference on Signals, Systems and Computers (ACSSC 2004), IEEE, pp. 488-492, 2004.
7. J. Lano, N. Mentens, B. Preneel, and I. Verbauwhede, "Power Analysis of Synchronous Stream Ciphers with Resynchronization Mechanism," In ECRYPT Workshop, SASC - The State of the Art of Stream Ciphers, pp. 327-333, 2004.
8. L. Batina, J. Lano, N. Mentens, B. Preneel, I. Verbauwhede, and S. B. Örs, "Energy, Performance, Area versus Security Trade-offs for Stream Ciphers," In ECRYPT Workshop, SASC - The State of the Art of Stream Ciphers, pp. 302-310, 2004.
9. P. Schaumont, and I. Verbauwhede, "Thumbpod puts security under your thumb," Xilinx Xcell Journal(48), pp. 79-81, 2004.
10. Y. Matsuoka, P. Schaumont, K. Tiri, and I. Verbauwhede, "Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques," In Proc. Int. Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2004), pp. 303-311, 2004.
11. S. Yang, and I. Verbauwhede, "Methodology for memory analysis and optimization in embedded systems," In Proc. GSPx Embedded Signal Processing Conference, 6 pages, 2004.
12. K. Tiri, and I. Verbauwhede, "Charge recycling sense amplifier based logic: securing low power security ICs against DPA," In 30th European Solid-State Circuits Conference (ESSCIRC 2004), IEEE, pp. 179-182, 2004.
13. K. Tiri, and I. Verbauwhede, "Secure logic synthesis," In 14th International Conference on Field Programmable Logic and Applications (FPL 2004), Lecture Notes in Computer Science 3203, J. Becker, M. Platzner, and S. Vernalde (eds.), Springer-Verlag, pp. 1052-1055, 2004.
14. B. Lai, D. Hwang, S. Kim, and I. Verbauwhede, "Reducing radio energy consumption of key management protocols for wireless sensor networks," In International Symposium on Low Power Electronics and Design (ISLPED 2004), IEEE, pp. 351-356, 2004.
15. K. Tiri, and I. Verbauwhede, "Place and route for secure standard cell design," In Smart Card Research and Advanced Applications - 6th IFIP WG 8.8/11.2 International Conference, CARDIS 2004, Lecture Notes in Computer Science, Springer-Verlag, pp. 143-158, 2004.
16. M. Badaroglu, G. Van der Plas, P. Wambacq, L. Balasubramanian, K. Tiri, I. Verbauwhede, S. Donnay, G. Gielen, and H. De Man, "Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate," IEEE Journal of Solid-State Circuits 39(7), pp. 1119-1130, 2004.
17. D. Hwang, B. Lai, and I. Verbauwhede, "Energy-memory-security tradeoffs in distributed sensor networks," In Ad-hoc, Mobile and Wireless Networks - 3rd International Conference, ADHOC-NOW 2004, Lecture Notes in Computer Science 3158, M. Barbeau, E. Kranakis, and I. Nikolaidis (eds.), Springer-Verlag, pp. 70-81, 2004.
18. K. Tiri, and I. Verbauwhede, "Synthesis of secure FPGA implementations," In Proc. International Workshop on Logic and Synthesis (IWLS 2004), pp. 224-231, 2004.
19. I. Verbauwhede, C. Piguet, B. Kienhuis, and P. Schaumont, "Architectures and design techniques for energy efficient embedded DSP and multimedia processing," In Ultra Low-Power Electronics and Design 8, E. Macii (ed.), Kluwer Academic Publishers, pp. 141-155, 2004.
20. G. Kloeck, "Ontwerp van een compacte en veilige hardware implementatie van AES," Master thesis, Katholieke Universiteit Leuven, B. Preneel, and I. Verbauwhede (promotors), 59+14 pages, 2004.
21. A. Hodjat, and I. Verbauwhede, "High-throughput programmable cryptocoprocessor," IEEE Micro 24(3), pp. 34-45, 2004.
22. S. Yang, and I. Verbauwhede, "A realtime, memory efficient fingerprint verification system," In IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004), IEEE, pp. 189-192, 2004.
23. I. Verbauwhede, and P. Schaumont, "The happy marriage of architecture and application in next-generation reconfigurable systems," In Proceedings of the 1st Conference on Computing Frontiers (CF 2004), J. Gaudiot, V. Piuri, and S. Vassiliadis (eds.), ACM, pp. 363-376, 2004.
24. H. Chan, A. Hodjat, J. Shi, R. Wesel, and I. Verbauwhede, "Streaming encryption for a secure wavelength and time domain hopped optical network," In International Conference on Information Technology: Coding and Computing (ITCC 2004), IEEE, pp. 578-582, 2004.
25. A. Hodjat, P. Schaumont, and I. Verbauwhede, "Architectural design features of a programmable high-throughput AES co-processor," In International Conference on Information Technology: Coding and Computing (ITCC 2004), IEEE, pp. 498-502, 2004.
26. D. Ching, P. Schaumont, and I. Verbauwhede, "Integrated modeling and generation of a reconfigurable network-on-chip," In 18th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2004), IEEE, pp. 139-145, 2004.
27. A. Hodjat, and I. Verbauwhede, "A 21.54 Gbits/s fully pipelined AES processor on FPGA," In 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), IEEE, pp. 308-309, 2004.
28. P. Schaumont, K. Sakiyama, A. Hodjat, and I. Verbauwhede, "Embedded Software Integration for Coarse-grain Reconfigurable Architectures," In 18th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2004), IEEE, pp. 137-142, 2004.
29. I. Verbauwhede, P. Schaumont, P. Piguet, and B. Kienhuis, "Architectures and Design Techniques for Energy-Efficient Embedded DSP and Multimedia Processing," In Design, Automation and Test in Europe (DATE 2004), IEEE, pp. 988-995, 2004.
30. A. Hodjat, and I. Verbauwhede, "Minimum area cost for a 30 to 70 Gbits/s AES processor," In IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), IEEE, pp. 498-502, 2004.
31. K. Tiri, and I. Verbauwhede, "A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation," In Design, Automation and Test in Europe (DATE 2004), IEEE, pp. 246-251, 2004.
32. P. Schaumont, and I. Verbauwhede, "Interactive cosimulation with partial evaluation," In Design, Automation and Test in Europe (DATE 2004), IEEE, pp. 642-647, 2004.
33. J. Kim, J. Choi, C. Kim, F. Chang, and I. Verbauwhede, "A low power capacitive coupled bus interface based on pulsed signaling," In IEEE Custom Integrated Circuits Conference (CICC 2004), IEEE, pp. 35-38, 2004.
34. A. Hodjat, P. Schaumont, and I. Verbauwhede, "Architectural design features of a programmable high-throughput AES co-processor," In Embedded Cryptographic Hardware: Design and Security 14, N. Nejah (ed.), Nova Science Publishers, pp. 39-52, 2004.
35. H. Chan, A. Hodjat, J. Shi, R. Wesel, and I. Verbauwhede, "Streaming encryption for a secure wavelength and time domain hopped optical network," In Embedded Cryptographic Hardware: Design and Security 14, N. Nejah (ed.), Nova Science Publishers, pp. 241-251, 2004.
36. I. Verbauwhede, "Low Power DSP's," In Low Power Electronics Design 19, C. Piguet (ed.), CRC Press, pp. 19.1-19.15, 2004.
2003
1. S. Yang, and I. Verbauwhede, "A Secure Fingerprint Matching Technique," In Proceedings of the 2003 ACM SIGMM workshop on Biometrics methods and applications (WBMA 2003), ACM, pp. 89-94, 2003.
2. A. Hodjat, and I. Verbauwhede, "Speed-area trade-off for 10 to 100 Gbits/s throughput AES processor," In 37th Asilomar Conference on Signals, Systems and Computers (ACSSC 2003), IEEE, pp. 2147-2150, 2003.
3. P. Schaumont, K. Sakiyama, Y. Fan, D. Hwang, A. Hodjat, B. Lai, I. Verbauwhede, and S. Yang, "Testing ThumbPod: softcore bugs are hard to find," In 8th IEEE International High Level Design Validation and Test Workshop (HLDVT 2003), IEEE, pp. 77-82, 2003.
4. K. Tiri, and I. Verbauwhede, "Securing encryption algorithms against DPA at the logic level: next generation smart card technology," In Cryptographic Hardware and Embedded Systems - CHES 2003, Lecture Notes in Computer Science 2779, Ç. K. Koç, C. Paar, and C. D. Walter (eds.), Springer-Verlag, pp. 125-136, 2003.
5. D. Hwang, P. Schaumont, Y. Fan, A. Hodjat, B. Lai, K. Sakiyama, S. Yang, and I. Verbauwhede, "Design flow for HW/SW acceleration transparency in the thumbpod secure embedded system," In 40th Design Automation Conference (DAC 2003), IEEE, pp. 60-65, 2003.
6. K. Sakiyama, P. Schaumont, D. Hwang, and I. Verbauwhede, "Teaching trade-offs in system-level design methodologies," In IEEE International Conference on Microelectronic Systems Education (MSE 2003), IEEE, pp. 62-63, 2003.
7. P. Schaumont, and I. Verbauwhede, "Domain specific codesign for embedded security," Computer 36(4), pp. 68-74, 2003.
8. I. Verbauwhede, P. Schaumont, and H. Kuo, "Design and performance testing of a 2.29 Gb/s Rijndael processor," IEEE Journal of Solid-State Circuits 38(3), pp. 569-572, 2003.
9. K. Sakiyama, P. Schaumont, and I. Verbauwhede, "Finding the Best System Design Flow for a High-Speed JPEG Encoder," In Proceedings of the 8th Asia and South Pacific Design Automation Conference (ASP-DAC 2003), pp. 577 - 578, 2003.
2002
1. P. Schaumont, and I. Verbauwhede, "Domain specific tools and methods for application in security processor design," Kluwer Journal for Design Automation of Embedded Systems 7(4), pp. 365-383, 2002.
2. V. Srinivas, K. J. Bois, D. Knee, D. Quint, F. Chang, and I. Verbauwhede, "Gigabit simultaneous bi-directional signaling using DS-CDMA," In IEEE Electrical Performance of Electronic Packaging 2002, IEEE, pp. 15-18, 2002.
3. A. Hodjat, and I. Verbauwhede, "The Energy Cost of Secrets in ad-hoc Networks," In Proc. IEEE Circuits and Systems Workshop on Wireless Communications and Networking, 4 pages, 2002.
4. K. Tiri, M. Akmal, and I. Verbauwhede, "A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards," In 29th European Solid-State Circuits Conference (ESSCIRC 2002), IEEE, pp. 403-406, 2002.
5. C. Chitu, D. Chien, C. Chien, I. Verbauwhede, and F. Chang, "A hardware implementation in FPGA of the Rijndael algorithm," In 45th Midwest Symposium on Circuits and Systems (MWSCAS 2002), IEEE, pp. 507-510, 2002.
6. "International Symposium on Low Power Electronics and Design (ISLPED 2002)", I. Verbauwhede (ed.), IEEE, 2002.
7. P. Schaumont, H. Kuo, and I. Verbauwhede, "Unlocking the design secrets of a 2.29 Gb/s Rijndael encryption processor," In 39th Design Automation Conference (DAC 2002), IEEE, pp. 634-639, 2002.
8. M. Badaroglu, K. Tiri, S. Donnay, P. Wambacq, I. Verbauwhede, G. Gielen, and H. De Man, "Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients," In 39th Design Automation Conference (DAC 2002), IEEE, pp. 399-404, 2002.
9. H. Kuo, P. Schaumont, and I. Verbauwhede, "A 2.29 Gbits/sec, 56 mW non-pipelined Rijndael AES encryption IC in a 1.8 V, 0.18 um CMOS technology," In IEEE Custom Integrated Circuits Conference (CICC 2002), IEEE, pp. 147-150, 2002.
10. I. Verbauwhede, and F. Chang, "Reconfigurable interconnect for next generation systems," In Proceedings of International Workshop on System Level Interconnect Prediction (SLIP 2002), pp. 71-74, 2002.
11. T. Henriksson, and I. Verbauwhede, "Fast IP address lookup engine for SoC integration," In 5th IEEE Workshop on Design and Diagnostics of Electronic Circuits & Systems (DDECS 2002), IEEE, pp. 200-210, 2002.
12. B. Lai, S. Kim, and I. Verbauwhede, "Scalable session key construction protocol for wireless sensor networks," In Proc. IEEE Workshop on Large Scale Real-Time and Embedded Systems (LARTES), 6 pages, 2002.
13. D. Hwang, C. Mittelsteadt, and I. Verbauwhede, "Benchmarking DSP Architectures for Low Power Applications," In The Application of Programmable DSPs in Mobile Communications 15, E. Auslander, and A. Gatherer (eds.), John Wiley & Sons, Ltd., pp. 287-298, 2002.
2001
1. I. Verbauwhede, "What Makes a DSP Processor Special?," In Computer Engineering Handbook 42.7, CRC Press, pp. 42-66-42-77, 2001.
2. P. Schaumont, and I. Verbauwhede, "A reconfiguration hierarchy for elliptic curve cryptography," In 35th Asilomar Conference on Signals, Systems and Computers (ACSSC 2001), IEEE, pp. 449-453, 2001.
3. S. Janssens, J. Thomas, W. Borremans, P. Gijsels, I. Verbauwhede, F. Vercauteren, B. Preneel, and J. Vandewalle, "Hardware/Software Co-design of an elliptic curve public-key cryptosystem," In IEEE Workshop on Signal Processing Systems: Design and Implementation (SIPS 2001), F. Catthoor, and M. Moonen (eds.), IEEE, pp. 209-216, 2001.
4. M. Attia, and I. Verbauwhede, "Programmable gigabit ethernet packet processor design methodology," In European Conference on Circuit Theory and Design (ECCTD 2001), IEEE, pp. III-177-III-180, 2001.
5. I. Verbauwhede, "The next HDL: if C++ is the answer, what was the question?," In 38th Design Automation Conference (DAC 2001), IEEE, pp. 71-72, 2001.
6. P. Schaumont, I. Verbauwhede, K. Keutzer, and M. Sarrafzadeh, "A quick safari through the reconfiguration jungle (Invited)," In 38th Design Automation Conference (DAC 2001), IEEE, pp. 172-177, 2001.
7. D. Hwang, C. Mittelsteadt, and I. Verbauwhede, "Low power showdown: comparison of five DSP platforms implementing an LPC speech codec," In IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2001), IEEE, pp. 1125-1128, 2001.
8. H. Kuo, and I. Verbauwhede, "Architectural optimization for a 1.82 Gbits/sec VLSI implementation of the AES Rijndael algorithm," In Cryptographic Hardware and Embedded Systems - CHES 2001, Lecture Notes in Computer Science 2162, Ç. K. Koç, D. Naccache, and C. Paar (eds.), Springer-Verlag, pp. 51-64, 2001.
2000
1. T. Ngo, and I. Verbauwhede, "Turbo codes on the fixed point DSP TMS320C55x," In IEEE Workshop on Signal Processing Systems: Design and Implementation (SIPS 2000), IEEE, pp. 255-264, 2000.
2. I. Verbauwhede, and C. Nicol, "Low power DSP's for wireless communications," In International Symposium on Low Power Electronics and Design (ISLPED 2000), IEEE, pp. 303-310, 2000.
3. I. Verbauwhede, "Fast regular multiplier architecture", Patent number 6,029,187, Atmel Corporation (applicant), 2000.
1999
1. I. Verbauwhede, and M. Touriguian, "Wireless Digital Signal Processors," In Digital Signal Processing for Multimedia Systems 11, T. Nishitani, and K. K. Parhi (eds.), Marcel Dekker, pp. 273-298, 1999.
1998
1. M. Touriguian, G. Fettweis, and I. Verbauwhede, "Digital signal processing method and system employing separate program and data memories to store data", Patent number 5,832,257, Atmel Corporation (applicant), 1998.
2. I. Verbauwhede, "Signal processing system with ROM storing instructions encoded for reducing power consumpton during reads and method for encoding such instructions ", Patent number 5,732,255, Atmel Corporation (applicant), 1998.
3. I. Verbauwhede, and M. Touriguian, "A Low Power DSP Engine for Wireless Communications," Journal of VLSI Signal Processing 18(2), pp. 177-186, 1998.
4. I. Verbauwhede, and G. Fettweis, "Digital signal processing method and system implementing pipelined read and write operations ", Patent number 5,710,914, Atmel Corporation (applicant), 1998.
5. K. Gupta, M. Touriguian, I. Verbauwhede, and H. Neff, "Method and Apparatus for Executing Nested Loops in a Digital Signal Processor", Patent number 5,710,913, Atmel Corporation (applicant), 1998.
1996
1. I. Verbauwhede, C. Scheers, and J. M. Rabaey, "Analysis of Multidimensional DSP Specifications," IEEE Transactions on Signal Processing 44(12), pp. 3169-3174, 1996.
2. I. Verbauwhede, M. Touriguian, K. Gupta, J. Muwafi, K. Yick, and G. Fettweis, "A Low Power DSP Engine for Wireless Communications," In VLSI Signal Processing - IX, W. Burleson, K. Konstantinides, and T. Meng (eds.), IEEE Press, pp. 471-480, 1996.
3. I. Verbauwhede, and M. Touriguian, "Lode DSP Engine, High Performance at Low Power," DSP and Multimedia Technology 5(6), pp. 24-30, 1996.
1995
1. I. Verbauwhede, and J. M. Rabaey, "Synthesis for real Time Systems: Solutions and Challenges," Journal of VLSI Signal Processing 9(1-2), pp. 67-88, 1995.
1994
1. I. Verbauwhede, C. Scheers, and J. M. Rabaey, "Specification and Support for Multi-Dimensional DSP in the Silage Language," In IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 1994), IEEE, pp. 473-476, 1994.
2. I. Verbauwhede, C. Scheers, and J. M. Rabaey, "Memory Estimation for High Level Synthesis," In 31st Design Automation Conference (DAC 1994), IEEE, pp. 143-148, 1994.
1991
1. I. Verbauwhede, F. Catthoor, J. Vandewalle, and H. De Man, "In-place Memory management of Algebraic Algorithms on application Specific ICs," Journal of VLSI Signal Processing 3(3), pp. 193-199, 1991.
2. I. Verbauwhede, F. Catthoor, J. Vandewalle, and H. De Man, "In-Place Memory Management of Algebraic Algorithms on Application Specific ICs," In Proc. International Workshop on Algorithms and Parallel VLSI Architectures B, pp. 353-362, 1991.
3. I. Verbauwhede, "VLSI Design Methodologies for Application-Specific Cryptographic and Algebraic Systems," PhD thesis, Katholieke Universiteit Leuven, , 245 pages, 1991.
4. I. Verbauwhede, F. Hoornaert, J. Vandewalle, and H. De Man, "ASIC Cryptographical Processor based on DES," In European Event in ASIC Design (EUROASIC 1991), IEEE, pp. 292-295, 1991.
1990
1. I. Verbauwhede, M. Vertongen, J. Weijers, F. Catthoor, J. Vandewalle, and H. De Man, "Micro-coded ASIC Architecture for Real-Time Extraction of a Fetal Electro Cardiogram using the SVD Algorithm," In VLSI Signal Processing - IV 36, R. Jain, H. S. Moscovitz, and K. Yao (eds.), IEEE Press, pp. 371-380, 1990.
1989
1. M. Degrauwe, E. Vittoz, and I. Verbauwhede, "A Micro Power CMOS-Instrumentation Amplifier," In Analog MOS Integrated Circuits II, R. Broadersen, P. Gray, and B. Wooley (eds.), IEEE Press, pp. 96-98, 1989.
2. I. Verbauwhede, F. Catthoor, J. Vandewalle, and H. De Man, "Background Memory Synthesis for Algebraic Algorithms on Multi-Processor DSP Chips," In Proc. of the IFIP International Conference on VLSI 89, pp. 209-218, 1989.
1988
1. I. Verbauwhede, F. Hoornaert, J. Vandewalle, and H. De Man, "Security and performance optimization of a new DES Data Encryption Chip," IEEE Journal of Solid-State Circuits 23(3), pp. 647-656, 1988.
1987
1. I. Verbauwhede, F. Hoornaert, J. Vandewalle, and H. De Man, "Security considerations in the design and implementation of a new DES chip," In Advances in Cryptology - EUROCRYPT 1987, Lecture Notes in Computer Science 304, D. Chaum, and W. L. Price (eds.), Springer-Verlag, pp. 287-300, 1987.
2. I. Verbauwhede, F. Hoornaert, J. Vandewalle, and H. De Man, "Security and performance optimization of a new DES Data Encryption Chip," In 13th European Solid-State Circuits Conference (ESSCIRC 1987), IEEE, pp. 31-34, 1987.
1985
1. P. Van Peteghem, I. Verbauwhede, and W. M. Sansen, "Micropower High-Performance SC Building Block for Integrated Low-Level Signal Processing," IEEE Journal of Solid-State Circuits 20(4), pp. 837-844, 1985.
2. M. Degrauwe, E. Vittoz, and I. Verbauwhede, "A Micropower CMOS - Instrumentation Amplifier," IEEE Journal of Solid-State Circuits 20(3), pp. 805-807, 1985.
1984
1. M. Degrauwe, E. Vittoz, and I. Verbauwhede, "A Micro Power CMOS-Instrumentation Amplifier," In 10th European Solid-State Circuits Conference (ESSCIRC 1984), IEEE, pp. 31-34, 1984.